On Wednesday 10 September 2008 00:45:07 Sven Eckelmann wrote:
[...] /* v0 and v1 holds pointer to new allocated struct */ /* a3 holds "zero" - like t0 */ 9a8: sw s1,8(v0) /* store pointer to client_data in new data buffer */ 9ac: lw v0,36(a3) /* v0 gets free_client_list.next -> lets call it next_element */ /* shouldn't be another instruction between load and usage of the register? - like a nop */ 9b0: sw v0,0(v1) /* store next_element in tmp_entry.list.next */ 9b4: sw v1,4(v0) /* store pointer to tmp_entry next_element.prev */ 9b8: sw v1,36(a3) /* store pointer to tmp_entry in freeclient_list.next */ 9bc: j 9d4 <cleanup_module+0x524> 9c0: sw t0,4(v1) /* saves freeclient_list in tmp_entry.prev << if this would not be executed in parallel, we would get wrong data here, but because we are using mips it must be executed */ [...]
Ok, searched inside the official mips32 instruction set reference and both questionable instructions are defined in a hard way without any unpredictable or undefined remarks. So they should be working fine.
Best regards Sven Eckelmann