The following commit has been merged in the linux branch: commit 830cb6fafc12af6c105aaaf794543e4423ca79c3 Author: Heiko Schocher hs@denx.de Date: Thu Oct 15 09:33:24 2009 -0600
mpc5200: support for the MAN mpc5200 based board mucmc52
- serial Console on PSC1 - 64MB SDRAM - MTD CFI Flash - Ethernet FEC - IDE support
Signed-off-by: Heiko Schocher hs@denx.de Reviewed-by: Wolfram Sang w.sang@pengutronix.de Signed-off-by: Grant Likely grant.likely@secretlab.ca
diff --git a/arch/powerpc/boot/dts/uc101.dts b/arch/powerpc/boot/dts/mucmc52.dts similarity index 67% copy from arch/powerpc/boot/dts/uc101.dts copy to arch/powerpc/boot/dts/mucmc52.dts index 019264c..b72a758 100644 --- a/arch/powerpc/boot/dts/uc101.dts +++ b/arch/powerpc/boot/dts/mucmc52.dts @@ -1,5 +1,5 @@ /* - * Manroland uc101 board Device Tree Source + * Manroland mucmc52 board Device Tree Source * * Copyright (C) 2009 DENX Software Engineering GmbH * Heiko Schocher hs@denx.de @@ -14,8 +14,8 @@ /dts-v1/;
/ { - model = "manroland,uc101"; - compatible = "manroland,uc101"; + model = "manroland,mucmc52"; + compatible = "manroland,mucmc52"; #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&mpc5200_pic>; @@ -64,7 +64,7 @@ reg = <0x500 0x80>; };
- gpt0: timer@600 { // General Purpose Timer in GPIO mode + gpt0: timer@600 { // GPT 0 in GPIO mode compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; reg = <0x600 0x10>; interrupts = <1 9 0>; @@ -96,38 +96,6 @@ #gpio-cells = <2>; };
- gpt4: timer@640 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x640 0x10>; - interrupts = <1 13 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt5: timer@650 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x650 0x10>; - interrupts = <1 14 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt6: timer@660 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x660 0x10>; - interrupts = <1 15 0>; - gpio-controller; - #gpio-cells = <2>; - }; - - gpt7: timer@670 { // General Purpose Timer in GPIO mode - compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; - reg = <0x670 0x10>; - interrupts = <1 16 0>; - gpio-controller; - #gpio-cells = <2>; - }; - gpio_simple: gpio@b00 { compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio"; reg = <0xb00 0x40>; @@ -170,7 +138,7 @@ interrupts = <2 2 0>; };
- serial@2c00 { /* PSC6 in UART mode */ + serial@2c00 { /* PSC6 in UART mode */ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; reg = <0x2c00 0x100>; interrupts = <2 4 0>; @@ -188,8 +156,8 @@ #address-cells = <1>; #size-cells = <0>; compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; - reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts - interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. + reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts + interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
phy0: ethernet-phy@0 { compatible = "intel,lxt971"; @@ -209,9 +177,6 @@ compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; reg = <0x3d40 0x40>; interrupts = <2 16 0>; - fsl,preserve-clocking; - clock-frequency = <400000>; - hwmon@2c { compatible = "ad,adm9240"; reg = <0x2c>; @@ -228,6 +193,29 @@ }; };
+ pci@f0000d00 { + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; + reg = <0xf0000d00 0x100>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = < + /* IDSEL 0x10 */ + 0x8000 0 0 1 &mpc5200_pic 0 3 3 + 0x8000 0 0 2 &mpc5200_pic 0 3 3 + 0x8000 0 0 3 &mpc5200_pic 0 2 3 + 0x8000 0 0 4 &mpc5200_pic 0 1 3 + >; + clock-frequency = <0>; // From boot loader + interrupts = <2 8 0 2 9 0 2 10 0>; + bus-range = <0 0>; + ranges = <0x42000000 0 0x60000000 0x60000000 0 0x10000000 + 0x02000000 0 0x90000000 0x90000000 0 0x10000000 + 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>; + }; + localbus { compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
@@ -241,11 +229,10 @@ flash@0,0 { compatible = "cfi-flash"; reg = <0 0 0x00800000>; - bank-width = <2>; + bank-width = <4>; device-width = <2>; #size-cells = <1>; #address-cells = <1>; - partition@0 { label = "DTS"; reg = <0x0 0x00100000>; @@ -268,17 +255,78 @@ }; partition@740000 { label = "Env"; - reg = <0x00740000 0x00010000>; + reg = <0x00740000 0x00020000>; }; - partition@750000 { + partition@760000 { label = "red. Env"; - reg = <0x00750000 0x00010000>; + reg = <0x00760000 0x00020000>; }; - partition@760000 { + partition@780000 { label = "reserve"; - reg = <0x00760000 0x000a0000>; + reg = <0x00780000 0x00080000>; }; };
+ simple100: gpio-controller-100@3,600100 { + compatible = "manroland,mucmc52-aux-gpio"; + reg = <3 0x00600100 0x1>; + gpio-controller; + #gpio-cells = <2>; + }; + simple104: gpio-controller-104@3,600104 { + compatible = "manroland,mucmc52-aux-gpio"; + reg = <3 0x00600104 0x1>; + gpio-controller; + #gpio-cells = <2>; + }; + simple200: gpio-controller-200@3,600200 { + compatible = "manroland,mucmc52-aux-gpio"; + reg = <3 0x00600200 0x1>; + gpio-controller; + #gpio-cells = <2>; + }; + simple201: gpio-controller-201@3,600201 { + compatible = "manroland,mucmc52-aux-gpio"; + reg = <3 0x00600201 0x1>; + gpio-controller; + #gpio-cells = <2>; + }; + simple202: gpio-controller-202@3,600202 { + compatible = "manroland,mucmc52-aux-gpio"; + reg = <3 0x00600202 0x1>; + gpio-controller; + #gpio-cells = <2>; + }; + simple203: gpio-controller-203@3,600203 { + compatible = "manroland,mucmc52-aux-gpio"; + reg = <3 0x00600203 0x1>; + gpio-controller; + #gpio-cells = <2>; + }; + simple204: gpio-controller-204@3,600204 { + compatible = "manroland,mucmc52-aux-gpio"; + reg = <3 0x00600204 0x1>; + gpio-controller; + #gpio-cells = <2>; + }; + simple206: gpio-controller-206@3,600206 { + compatible = "manroland,mucmc52-aux-gpio"; + reg = <3 0x00600206 0x1>; + gpio-controller; + #gpio-cells = <2>; + }; + simple207: gpio-controller-207@3,600207 { + compatible = "manroland,mucmc52-aux-gpio"; + reg = <3 0x00600207 0x1>; + gpio-controller; + #gpio-cells = <2>; + }; + simple20f: gpio-controller-20f@3,60020f { + compatible = "manroland,mucmc52-aux-gpio"; + reg = <3 0x0060020f 0x1>; + gpio-controller; + #gpio-cells = <2>; + }; + }; }; diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig index aaa4416..d035421 100644 --- a/arch/powerpc/configs/mpc5200_defconfig +++ b/arch/powerpc/configs/mpc5200_defconfig @@ -205,7 +205,7 @@ CONFIG_RTAS_PROC=y CONFIG_PPC_BESTCOMM=y CONFIG_PPC_BESTCOMM_ATA=y CONFIG_PPC_BESTCOMM_FEC=y -# CONFIG_SIMPLE_GPIO is not set +CONFIG_SIMPLE_GPIO=y
# # Kernel options diff --git a/arch/powerpc/platforms/52xx/mpc5200_simple.c b/arch/powerpc/platforms/52xx/mpc5200_simple.c index caf6d92..d45be5b 100644 --- a/arch/powerpc/platforms/52xx/mpc5200_simple.c +++ b/arch/powerpc/platforms/52xx/mpc5200_simple.c @@ -51,6 +51,7 @@ static void __init mpc5200_simple_setup_arch(void) /* list of the supported boards */ static char *board[] __initdata = { "intercontrol,digsy-mtc", + "manroland,mucmc52", "manroland,uc101", "phytec,pcm030", "phytec,pcm032",