The following commit has been merged in the linux branch: commit 371bc96b89467c89c07a75aa4331bb8327afdc30 Author: Heiko Schocher hs@denx.de Date: Thu Oct 15 09:29:32 2009 -0600
mpc5200: support for the MAN mpc5200 based board uc101
- serial Console on PSC1 - 64MB SDRAM - MTD CFI Flash - Ethernet FEC - I2C with PCF8563 and Temp. Sensor ADM9240 - IDE support
Signed-off-by: Heiko Schocher hs@denx.de Reviewed-by: Wolfram Sang w.sang@pengutronix.de Signed-off-by: Grant Likely grant.likely@secretlab.ca
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/uc101.dts similarity index 61% copy from arch/powerpc/boot/dts/cm5200.dts copy to arch/powerpc/boot/dts/uc101.dts index cee8080..019264c 100644 --- a/arch/powerpc/boot/dts/cm5200.dts +++ b/arch/powerpc/boot/dts/uc101.dts @@ -1,8 +1,9 @@ /* - * CM5200 board Device Tree Source + * Manroland uc101 board Device Tree Source * - * Copyright (C) 2007 Semihalf - * Marian Balakowicz m8@semihalf.com + * Copyright (C) 2009 DENX Software Engineering GmbH + * Heiko Schocher hs@denx.de + * Copyright 2006-2007 Secret Lab Technologies Ltd. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -13,8 +14,8 @@ /dts-v1/;
/ { - model = "schindler,cm5200"; - compatible = "schindler,cm5200"; + model = "manroland,uc101"; + compatible = "manroland,uc101"; #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&mpc5200_pic>; @@ -28,8 +29,8 @@ reg = <0>; d-cache-line-size = <32>; i-cache-line-size = <32>; - d-cache-size = <0x4000>; // L1, 16K - i-cache-size = <0x4000>; // L1, 16K + d-cache-size = <0x4000>; // L1, 16K + i-cache-size = <0x4000>; // L1, 16K timebase-frequency = <0>; // from bootloader bus-frequency = <0>; // from bootloader clock-frequency = <0>; // from bootloader @@ -63,59 +64,68 @@ reg = <0x500 0x80>; };
- timer@600 { // General Purpose Timer + gpt0: timer@600 { // General Purpose Timer in GPIO mode compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; reg = <0x600 0x10>; interrupts = <1 9 0>; - fsl,has-wdt; + gpio-controller; + #gpio-cells = <2>; };
- timer@610 { // General Purpose Timer + gpt1: timer@610 { // General Purpose Timer in GPIO mode compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; reg = <0x610 0x10>; interrupts = <1 10 0>; + gpio-controller; + #gpio-cells = <2>; };
- timer@620 { // General Purpose Timer + gpt2: timer@620 { // General Purpose Timer in GPIO mode compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; reg = <0x620 0x10>; interrupts = <1 11 0>; + gpio-controller; + #gpio-cells = <2>; };
- timer@630 { // General Purpose Timer + gpt3: timer@630 { // General Purpose Timer in GPIO mode compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; reg = <0x630 0x10>; interrupts = <1 12 0>; + gpio-controller; + #gpio-cells = <2>; };
- timer@640 { // General Purpose Timer + gpt4: timer@640 { // General Purpose Timer in GPIO mode compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; reg = <0x640 0x10>; interrupts = <1 13 0>; + gpio-controller; + #gpio-cells = <2>; };
- timer@650 { // General Purpose Timer + gpt5: timer@650 { // General Purpose Timer in GPIO mode compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; reg = <0x650 0x10>; interrupts = <1 14 0>; + gpio-controller; + #gpio-cells = <2>; };
- timer@660 { // General Purpose Timer + gpt6: timer@660 { // General Purpose Timer in GPIO mode compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; reg = <0x660 0x10>; interrupts = <1 15 0>; + gpio-controller; + #gpio-cells = <2>; };
- timer@670 { // General Purpose Timer + gpt7: timer@670 { // General Purpose Timer in GPIO mode compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; reg = <0x670 0x10>; interrupts = <1 16 0>; - }; - - rtc@800 { // Real time clock - compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc"; - reg = <0x800 0x100>; - interrupts = <1 5 0 1 6 0>; + gpio-controller; + #gpio-cells = <2>; };
gpio_simple: gpio@b00 { @@ -134,18 +144,6 @@ #gpio-cells = <2>; };
- spi@f00 { - compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; - reg = <0xf00 0x20>; - interrupts = <2 13 0 2 14 0>; - }; - - usb@1000 { - compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be"; - reg = <0x1000 0xff>; - interrupts = <2 6 0>; - }; - dma-controller@1200 { compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm"; reg = <0x1200 0x80>; @@ -160,25 +158,19 @@ reg = <0x1f00 0x100>; };
- serial@2000 { // PSC1 + serial@2000 { /* PSC1 in UART mode */ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; reg = <0x2000 0x100>; interrupts = <2 1 0>; };
- serial@2200 { // PSC2 + serial@2200 { /* PSC2 in UART mode */ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; reg = <0x2200 0x100>; interrupts = <2 2 0>; };
- serial@2400 { // PSC3 - compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; - reg = <0x2400 0x100>; - interrupts = <2 3 0>; - }; - - serial@2c00 { // PSC6 + serial@2c00 { /* PSC6 in UART mode */ compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart"; reg = <0x2c00 0x100>; interrupts = <2 4 0>; @@ -196,21 +188,38 @@ #address-cells = <1>; #size-cells = <0>; compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; - reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts - interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. + reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts + interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
phy0: ethernet-phy@0 { + compatible = "intel,lxt971"; reg = <0>; }; };
+ ata@3a00 { + compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata"; + reg = <0x3a00 0x100>; + interrupts = <2 7 0>; + }; + i2c@3d40 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; reg = <0x3d40 0x40>; interrupts = <2 16 0>; - fsl5200-clocking; + fsl,preserve-clocking; + clock-frequency = <400000>; + + hwmon@2c { + compatible = "ad,adm9240"; + reg = <0x2c>; + }; + rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; };
sram@8000 { @@ -220,19 +229,56 @@ };
localbus { - compatible = "fsl,mpc5200b-lpb","simple-bus"; + compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus"; + #address-cells = <2>; #size-cells = <1>; - ranges = <0 0 0xfc000000 0x2000000>;
- // 16-bit flash device at LocalPlus Bus CS0 + ranges = <0 0 0xff800000 0x00800000 + 1 0 0x80000000 0x00800000 + 3 0 0x80000000 0x00800000>; + flash@0,0 { compatible = "cfi-flash"; - reg = <0 0 0x2000000>; + reg = <0 0 0x00800000>; bank-width = <2>; device-width = <2>; #size-cells = <1>; #address-cells = <1>; + + partition@0 { + label = "DTS"; + reg = <0x0 0x00100000>; + }; + partition@100000 { + label = "Kernel"; + reg = <0x100000 0x00200000>; + }; + partition@300000 { + label = "RootFS"; + reg = <0x00300000 0x00200000>; + }; + partition@500000 { + label = "user"; + reg = <0x00500000 0x00200000>; + }; + partition@700000 { + label = "U-Boot"; + reg = <0x00700000 0x00040000>; + }; + partition@740000 { + label = "Env"; + reg = <0x00740000 0x00010000>; + }; + partition@750000 { + label = "red. Env"; + reg = <0x00750000 0x00010000>; + }; + partition@760000 { + label = "reserve"; + reg = <0x00760000 0x000a0000>; + }; }; + }; }; diff --git a/arch/powerpc/platforms/52xx/mpc5200_simple.c b/arch/powerpc/platforms/52xx/mpc5200_simple.c index c31e5b5..caf6d92 100644 --- a/arch/powerpc/platforms/52xx/mpc5200_simple.c +++ b/arch/powerpc/platforms/52xx/mpc5200_simple.c @@ -51,6 +51,7 @@ static void __init mpc5200_simple_setup_arch(void) /* list of the supported boards */ static char *board[] __initdata = { "intercontrol,digsy-mtc", + "manroland,uc101", "phytec,pcm030", "phytec,pcm032", "promess,motionpro",